175 research outputs found

    Effect of impact ionization in scaled pHEMTs

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    The effect of impact ionization on pseudomorphic high electron mobility transistors is studied using Monte Carlo simulations when these devices are scaled into deep decanano dimensions. The scaling of devices with gate lengths of 120, 90, 70, 50 and 30 nm has been performed in both lateral and vertical directions. The impact ionization is treated as an additional scattering mechanism in the Monte Carlo module. The critical drain voltage, at which device characteristics begin to indicate breakdown, decreases as the gate voltage is lowered. Similarly, the breakdown drain voltage is also found to decrease during the scaling process

    RF analysis of aggressively scaled pHEMTs

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    Low noise high performance 50nm T-gate metamorphic HEMT with cut-off frequency f<sub>T</sub> of 440 GHz for millimeterwave imaging receivers applications

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    The 50 nm m-HEMT exhibits extremely high f&lt;sub&gt;T&lt;/sub&gt;, of 440GHz, low F&lt;sub&gt;min&lt;/sub&gt; of 0.7 dB, associated gain of 13 dB at 26 GHz with an exceptionally high Id of 200 mA/mm and gm of 950 ms/mm at low noise biased point

    50-nm self-aligned and 'standard' T-gate InP pHEMT comparison: the influence of parasitics on performance at the 50-nm node

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    Continued research into the development of III-V high-electron mobility transistors (HEMTs), specifically the minimization of the device gate length, has yielded the fastest performance reported for any three terminal devices to date. In addition, more recent research has begun to focus on reducing the parasitic device elements such as access resistance and gate fringing capacitance, which become crucial for short gate length device performance maximization. Adopting a self-aligned T-gate architecture is one method used to reduce parasitic device access resistance, but at the cost of increasing parasitic gate fringing capacitances. As the device gate length is then reduced, the benefits of the self-aligned gate process come into question, as at these ultrashort-gate dimensions, the magnitude of the static fringing capacitances will have a greater impact on performance. To better understand the influence of these issues on the dc and RF performance of short gate length InP pHEMTs, the authors present a comparison between In0.7Ga0.3As channel 50-nm self-aligned and "standard" T-gate devices. Figures of merit for these devices include transconductance greater than 1.9 S/mm, drive current in the range 1.4 A/mm, and fT up to 490 GHz. Simulation of the parasitic capacitances associated with the self-aligned gate structure then leads a discussion concerning the realistic benefits of incorporating the self-aligned gate process into a sub-50-nm HEMT syste

    50-nm T-gate metamorphic GaAs HEMTs with f<sub>T</sub> of 440 GHz and noise figure of 0.7 dB at 26 GHz

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    GaAs-based transistors with the highest f/sub T/ and lowest noise figure reported to date are presented in this letter. A 50-nm T-gate In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As metamorphic high-electron mobility transistors (mHEMTs) on a GaAs substrate show f/sub T/ of 440 GHz, f/sub max/ of 400 GHz, a minimum noise figure of 0.7 dB and an associated gain of 13 dB at 26 GHz, the latter at a drain current of 185 mA/mm and g/sub m/ of 950 mS/mm. In addition, a noise figure of below 1.2 dB with 10.5 dB or higher associated gain at 26 GHz was demonstrated for drain currents in the range 40 to 470 mA/mm at a drain bias of 0.8 V. These devices are ideal for low noise and medium power applications at millimeter-wave frequencies

    50 nm GaAs mHEMTs and MMICs for ultra-low power distributed sensor network applications

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    We report well-scaled 50 nm GaAs metamorphic HEMTs (mHEMTs) with DC power consumption in the range 1-150 &#924;W/&#924; demonstrating f&lt;sub&gt;T&lt;/sub&gt; of 30-400 GHz. These metrics enable the realisation of ultra-low power (&lt;500 &#924;W) radio transceivers for autonomous distributed sensor network applications

    Effect Of AlN Spacer In The Layer Structure On High Rf Performance GaN-Based HEMTs On Low Resistivity Silicon At K-Band Application

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    AlGaN/GaN High Electron Mobility Transistors (HEMTs) grown on Si substrate are emerging as an attractive devices for many RF applications. This is due to lower circuits realization cost and multifunction chips integration. In this study we investigate the effect of AlN spacer between AlGaN and GaN of a sub-micron gate (0.3 μm) AlGaN/GaN and AlGaN/AlN/GaN HEMTs on a Low Resistivity LR Si substrates on RF performance. We have observed an enhancement in RF performance fT and fMAX in the HEMT with of AlN spacer; (fT) was increased from 47 GHz to 55 GHz and (fMAX) was increased from 79 GHz to 121 GHz. This enhancement in performance is mainly due to the increase in the mobility in the channel and confinement of the carriers reducing Cgs, and delay τ under the gate. We believe this is the first RF study of this type as previous studies were based on the effects of the DC characteristic of the devices [1]

    Terahertz Microstrip Elevated Stack Antenna Technology on GaN-on-Low Resistivity Silicon Substrates for TMIC

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    In this paper we demonstrate a THz microstrip stack antenna on GaN-on-low resistivity silicon substrates (ρ &lt; 40 Ω.cm). To reduce losses caused by the substrate and to enhance performance of the integrated antenna at THz frequencies, the driven patch is shielded by silicon nitride and gold in addition to a layer of benzocyclobutene (BCB). A second circular patch is elevated in air using gold posts, making this design a stack configuration. The demonstrated antenna shows a measured resonance frequency in agreement with the modeling at 0.27 THz and a measured S11 as low as −18 dB was obtained. A directivity, gain and radiation efficiency of 8.3 dB, 3.4 dB, and 32% respectively was exhibited from the 3D EM model. To the authors' knowledge, this is the first demonstrated THz integrated microstrip stack antenna for TMIC (THz Monolithic Integrated Circuits) technology; the developed technology is suitable for high performance III-V material on low resistivity/high dielectric substrates

    Development of a low actuation voltage RF MEMS switch

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    This paper reports on the design of a novel ultra low actuation voltage, low loss radio frequency micro-electro-mechanical system (RF MEMS) capacitive shunt switch. The concept of the switch relies on a mechanically unconstrained armature actuated over a coplanar waveguide using electrostatic forces. The minimum actuation voltage of the switch is &lt;2V, with an isolation of 40dB and insertion loss &lt;0.7dB at 78GHz

    Very high performance 50 nm T-gate III-V HEMTs enabled by robust nanofabrication technologies

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    In this paper, we review a range of nanofabrication techniques which enable the realization of uniform, high yield, high performance 50 nm T-gate III-V high electron mobility transistors (HEMTs). These technologies have been applied in the fabrication of a range of lattice matched and pseudomorphic InP HEMTs and GaAs metamorphic HEMTs with functional yields in excess of 95%, threshold voltage uniformity of 5 mV, DC transconductance of up to 1600 mS/mm and f/sub T/ of up to 480 GHz. These technologies and device demonstrators are key to enabling a wide range of millimeter-wave imaging and sensing applications beyond 100 GHz, particularly where array-based multi-channel solutions are required
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